Summer computer simulation conference

27-30 June 2011, World Forum, The Hague, Netherlands

 

P.O. Box 17900
San Diego, CA 92177-7900
Tel: 858-277-3888
Fax: 858-277-3930
E-mail: scs@scs.org
http://www.scs.org

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SCSC ’11 Call for Papers

Computer Architecture Simulation (CAS)

Workshop/Paper Track at the Summer Computer Simulation Conference 2011

(SCSC ‘11)

 

Chairs:

José L. Risco-Martín, Complutense University of Madrid, Madrid, Spain;

J. Manuel Colmenar C.E.S. Felipe II - Complutense University of Madrid, Madrid, Spain

 

 

Track Description

In an era in which designers navigate the entangled problems of power consumption, performance, parallelism, thermal effects, and reliability, we find ourselves increasingly dependent on models and simulation to ensure that our designs will meet expectations.

Simulators have become an integral part of the computer architecture research and design process. Since they have the advantages of cost, time, and flexibility, engineers apply simulation to guide the design space exploration and to quantify the efficacy of any new enhancement.

However, long simulation times and poor accuracy limit their effectiveness in most cases.

 

This track is devoted to present, discus, and debate innovative ideas and techniques for advanced simulation related to processors, memories, system-on-chips, network-on-chips, datapaths or any computer architecture proposal.

 

Topics of particular interest include, but are not limited to:

 

· Microarchitecture modeling and simulation methodology

· Microarchitecture support for reliability

· Novel memory and storage architectures

· Low power design, design efficiency optimizations

· Novel approaches to fine-grain parallel processing

· Architectures, simulators and compilers for MPSoCs, graphics/gaming

· embedded processors, DSPs, ASIPs (network, multimedia, wireless, etc.)

 

Authors must strictly follow SCSC guidelines for paper submission.