2011
EMSS 2011 Proceeding
Simulation And Modelling Of The Flat-Band Voltage For Below 200nm SOI Devices
Authors: Cristian Ravariu, Florin Babarada
Abstract
The nowadays SOI technologies frequently offer below 200nm, even up to tens of nanometre, for film on insulator. The flat-band voltage is one of main parameter in the electrical characterization of the SOI devices. The conventional models for this voltage were established for thicker structures, with 0.5...2?m Si-film thickness and 2- 3?m buried oxide thickness. The electric charge from the buried oxide was ignored because the interesting conduction occurs in the vicinity with the front oxide. The pseudo-MOS transistor is a dedicated device for the electrical characterization of SOI wafers and works with a buried channel. The downscaling consequences of the SOI sizes on the flat-band voltage modelling were studied in this paper, with applications on the pseudo-MOS device. KEY WORDS Modelling, simulation, SOI, buried interface, devices
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