Authors: Soonchul Lim, Youngsin Han, Chilgee Lee
Single processor semiconductor test equipment inevitably experiences idle time between tests. This idle time is increased when multiple operators use the same equipment. An increase in idle time is considered a loss factor and produces low equipment efficiency; therefore, it is important to decrease it. In this paper, we offer two methods to effectively decrease idle time in multi-user test equipment. The methods proposed here were developed using an atomic model and were coupled with discrete event system specification methodology. Features of our model include idle time that can be decreased more than the typical sequence and equipment status that can be monitored beforehand without adding extra time.